
_main:
	MOV	#2048, W15
	MOV	#6142, W0
	MOV	WREG, 32
	MOV	#1, W0
	MOV	WREG, 50
	MOV	#4, W0
	IOR	68
	LNK	#2

;HID_Read_Write.c,32 :: 		void main(void){
;HID_Read_Write.c,33 :: 		int Count = 0;
	PUSH	W10
	PUSH	W11
	MOV	#0, W0
	MOV	W0, [W14+0]
;HID_Read_Write.c,34 :: 		TRISB.RB0 = 0; PORTB.RB0 = 0;
	BCLR	TRISB, #0
	BCLR	PORTB, #0
;HID_Read_Write.c,36 :: 		PLLFBD = 70;             // PLL multiplier M=70
	MOV	#70, W0
	MOV	WREG, PLLFBD
;HID_Read_Write.c,37 :: 		CLKDIV = 0x0000;         // PLL prescaler N1=2, PLL postscaler N2=2
	CLR	CLKDIV
;HID_Read_Write.c,41 :: 		ACLKCON3 = 0xB4C1;       // Use primary oscillator (8MHz), APLL prescaler N1=2, APLL postscaler N2=2
	MOV	#46273, W0
	MOV	WREG, ACLKCON3
;HID_Read_Write.c,42 :: 		ACLKDIV3 = 0x0007;       // APLL multiplier M=24
	MOV	#7, W0
	MOV	WREG, ACLKDIV3
;HID_Read_Write.c,44 :: 		ANSELA = 0x00;           // Convert all I/O pins to digital
	CLR	ANSELA
;HID_Read_Write.c,45 :: 		ANSELB = 0x00;
	CLR	ANSELB
;HID_Read_Write.c,46 :: 		ANSELC = 0x00;
	CLR	ANSELC
;HID_Read_Write.c,47 :: 		ANSELD = 0x00;
	CLR	ANSELD
;HID_Read_Write.c,48 :: 		ANSELE = 0x00;
	CLR	ANSELE
;HID_Read_Write.c,49 :: 		ANSELG = 0x00;
	CLR	ANSELG
;HID_Read_Write.c,51 :: 		HID_Enable(&readbuff,&writebuff);
	MOV	#lo_addr(_writebuff), W11
	MOV	#lo_addr(_readbuff), W10
	CALL	_HID_Enable
;HID_Read_Write.c,53 :: 		while(1){
L_main0:
;HID_Read_Write.c,54 :: 		USB_Polling_Proc();    // Call this routine periodically
	CALL	_USB_Polling_Proc
;HID_Read_Write.c,55 :: 		kk = HID_Read();
	CALL	_HID_Read
	MOV	#lo_addr(_kk), W1
	MOV.B	W0, [W1]
;HID_Read_Write.c,56 :: 		if(kk != 0){
	CP.B	W0, #0
	BRA NZ	L__main7
	GOTO	L_main2
L__main7:
;HID_Read_Write.c,57 :: 		for(cnt=0;cnt<64;cnt++)
	MOV	#lo_addr(_cnt), W1
	CLR	W0
	MOV.B	W0, [W1]
L_main3:
	MOV	#lo_addr(_cnt), W0
	MOV.B	[W0], W1
	MOV.B	#64, W0
	CP.B	W1, W0
	BRA LTU	L__main8
	GOTO	L_main4
L__main8:
;HID_Read_Write.c,58 :: 		writebuff[cnt]=readbuff[cnt];
	MOV	#lo_addr(_cnt), W0
	ZE	[W0], W1
	MOV	#lo_addr(_writebuff), W0
	ADD	W0, W1, W2
	MOV	#lo_addr(_cnt), W0
	ZE	[W0], W1
	MOV	#lo_addr(_readbuff), W0
	ADD	W0, W1, W0
	MOV.B	[W0], [W2]
;HID_Read_Write.c,57 :: 		for(cnt=0;cnt<64;cnt++)
	MOV.B	#1, W1
	MOV	#lo_addr(_cnt), W0
	ADD.B	W1, [W0], [W0]
;HID_Read_Write.c,58 :: 		writebuff[cnt]=readbuff[cnt];
	GOTO	L_main3
L_main4:
;HID_Read_Write.c,60 :: 		LATB.RB0 = readbuff[63];
	MOV	#lo_addr(_readbuff+63), W0
	MOV.B	[W0], W0
	BTSS	W0, #0
	BCLR	LATB, #0
	BTSC	W0, #0
	BSET	LATB, #0
;HID_Read_Write.c,61 :: 		writebuff[0] = ++Count;
	MOV	[W14+0], W0
	ADD	W0, #1, W1
	MOV	W1, [W14+0]
	MOV	#lo_addr(_writebuff), W0
	MOV.B	W1, [W0]
;HID_Read_Write.c,63 :: 		HID_Write(&writebuff,64);
	MOV.B	#64, W11
	MOV	#lo_addr(_writebuff), W10
	CALL	_HID_Write
;HID_Read_Write.c,64 :: 		}
L_main2:
;HID_Read_Write.c,65 :: 		}
	GOTO	L_main0
;HID_Read_Write.c,66 :: 		}
L_end_main:
	ULNK
L__main_end_loop:
	BRA	L__main_end_loop
; end of _main
